A silicon wafer used as a substrate of a semiconductor device is cut from a silicon single crystal ingot, which is typically grown by the Czochralski method (hereafter, also referred to as “the CZ method”), and is manufactured through steps such as polishing. The CZ method is a method in which a seed crystal is dipped into and pulled upward from melted silicon in a quartz crucible so as to grow a single crystal. Generally, a crystal grown by this method includes a crystal defect called a grown-in defect.
Given that the pulling speed of a silicon single crystal is denoted by V, and the temperature gradient in the single crystal in its growth direction immediately after the pulling is denoted by G, the type of a grown-in defect introduced into the silicon crystal depends on V/G.
FIG. 1 is a longitudinal cross sectional view of a pulled single crystal, schematically illustrating an example of the relation between a defect distribution and V/G. The temperature gradient G is considered to be generally constant based on the thermal property of a hot-zone structure in a CZ furnace, and thus it is possible to control V/G by adjusting the pulling speed V. FIG. 1 is a diagram schematically illustrating the results of observing, by X-ray topography, the cross section of a single crystal that is obtained by cutting the crystal along its central axis, applying Cu thereto, and performing heat treatment thereon, the crystal being grown with V/G gradually decreased (FIG. 2, which will be described later, is also made by the same technique). The defect distribution illustrated in FIG. 1 is that of the case of growing a single crystal under specified conditions. The defect distribution (boundaries between defect regions) changes due to the shape of the hot zone, the presence/absence of a magnetic field, and the like.
In FIG. 1, a Crystal Originated Particle (COP) region is a region including a COP, which is the aggregate of vacancies (a microvoid) that lack atoms that should have constituted a crystal lattice at the time of growing a single crystal. A dislocation cluster region is a region including a dislocation cluster, which is an aggregate of interstitial silicon atoms that are excessively taken in between lattices. In the COP region, the closer a COP is to an OSF region, the smaller the size of a COP.
A grown-in defect has an adverse effect on the properties of a semiconductor device. For example, in the case of forming a MOS-FET on a silicon wafer, thermal oxidation is performed on the surface of the wafer for the formation of a gate oxide film. At this point, if a COP in the vicinity of the surface is taken into the oxide film, the gate oxide integrity (GOI) property of a semiconductor element deteriorates. In addition, a dislocation cluster also becomes a cause of poor properties of the device. For this reason, researches and developments have been conducted to obtain silicon wafers without these grown-in defects contained.
As illustrated in FIG. 1, a large V/G (a high pulling speed) results in excess vacancies, introducing a COP into a single crystal. A small V/G (a low pulling speed) results in excess interstitial silicon atoms, facilitating the occurrence of a dislocation cluster. In the growth of a silicon single crystal, in order to increase its productivity, the pulling speed is usually increased, making V/G large, and thus a wafer obtained from a pulled single crystal includes a COP.
A single crystal totally made up of a defect-free region, in which no COPs or dislocation clusters are included, is manufactured by performing crystal pulling while appropriately controlling the ratio (V/G) of the pulling speed V of the silicon single crystal to the temperature gradient G in the single crystal in its growth direction immediately after the pulling. That is, it is possible to preclude the introduction of a COP and a dislocation cluster into a crystal by controlling a pulling apparatus such that, in FIG. 1, V/G falls between a value equivalent to a position A and a value equivalent to a position B.
FIG. 2 is a diagram schematically illustrating a crosscut of a pulled silicon single crystal. FIG. 2 illustrates a wafer obtained by cutting a single crystal that is grown by controlling V/G to a value equivalent to a position C illustrated in FIG. 1. As illustrated in FIG. 2, an OSF region exists in the central part of the wafer, on the outside of which a PV region and a PI region exist in this order.
These regions are sandwiched between a region that includes a COP, which is an aggregate of vacancies, and a region that includes a dislocation cluster, which is an aggregate of interstitial silicon atoms, and are considered as defect-free regions, in which vacancies and interstitial silicon atoms balance out in terms of number and easily merge to disappear. The PV region is close to a region in which a COP occurs, and is a defect-free region in which a vacancy-type point defect is predominant. The PI region is adjacent to a region in which a dislocation cluster occurs, and is a defect-free region in which an interstitial-silicon-type point defect is predominant.
However, even such a wafer that consists of defect-free regions including no COPs or dislocation clusters is not always a perfect defect-free wafer. Although being a defect-free region, the OSF region is adjacent to a region in which COPs occur, and includes sheet-shaped oxygen precipitates (OSF nuclei) in an as-grown state. When the wafer is subjected to thermal oxidation treatment at a high temperature (generally from 1000° C. to 1200° C.), the OSF nuclei become obvious as an oxidation induced stacking fault (OSF).
The PV region includes oxygen precipitate nuclei in an as-grown state. When two-stage heat treatment is performed at a low temperature and a high temperature (e.g., at 800° C. and 1000° C.), an oxygen precipitate is prone to occur in the PV region. The PI region includes few oxygen precipitate nuclei in an as-grown state, and is a region in which an oxygen precipitate hardly occurs even heat treatment is performed thereon.
Defects existing in the OSF region and PV region described above are defects that become obvious when heat treatment or the like is performed under specific conditions. However, there is an increasingly unignorable influence on the yield of devices exerted by a microfine COP as well as an OSF region, which is not obvious in an as-grown state, and a defect existing in the PV region. For example, it is well-known that if an OSF occurring in the thermal oxidation at the high temperatures described above is generated and grown on the surface of a wafer, the OSF causes leakage current, leading to the deterioration in device properties. In addition, if oxygen precipitate nuclei included in the PV region forms oxygen precipitates in a heat treatment process in a manufacture process of a device, and the oxygen precipitates remain in an active layer of an element that constitutes a device, there is the risk of leakage current occurring in the device.
For this reason, it is important for a silicon wafer to have a reduced number of grown-in defects (including silicon oxides) in its outer-layer portion on which a device is to be formed.
Patent Literature 1 discloses a method for manufacturing a silicon single crystal wafer in which a silicon single crystal wafer having a surface, in its radial direction, the entirety of which is an N region (a region in which vacancy-type point defects and interstitial-silicon-type point defect are in proper quantities) is subjected to a rapid thermal process in an oxidizing atmosphere and subjected to a rapid thermal process in a nitriding atmosphere, an Ar atmosphere, or a mixed atmosphere thereof after the removal of an oxide film formed by the rapid thermal process in the oxidizing atmosphere. Patent Literature 1 describes that this enables the manufacture of a silicon wafer including no COPs, having a low OSF density, and including a bulk micro defect (BMD) in its bulk portion.
A BMD is a grown oxygen precipitate nucleus included in a semiconductor substrate, functioning as a gettering site that takes heavy metals therein. In a manufacture step for a semiconductor device, a BMD captures heavy metals, whereby it is possible to avoid the properties of a device from deteriorating due to the contamination of a device formation region in a silicon wafer by the heavy metal.
The present inventors investigated, by experiment, what kind of defect occurs in a wafer by the manufacturing method described in Patent Literature 1. In the manufacturing method, a condition for “a rapid thermal process in an oxidizing atmosphere” was set to 1250° C.×10 seconds. It was confirmed that OSF defects can be inactivated by this manufacturing method.
However, when reactive ion etching (RIE) was performed on a wafer having been subjected to such a process, there were observed sheet-shaped oxygen precipitates (OSF nuclei) in an OSF region and oxygen precipitate nuclei in a PV region having sizes of 9 nm or more (hereafter, referred to as “grown-in defects with silicon oxides”), as projections on an etching surface. That is, it was found that grown-in defects with silicon oxides cannot be eliminated by the oxidizing heat treatment at 1250° C.×10 seconds. Therefore, such a wafer cannot meet the manufacture of finer devices in the future because defects become obvious through heat treatment process and the like in a device step (a device manufacture process) and may have an adverse effect on properties of a device.
When a temperature in the oxidizing heat treatment is further raised, it is possible to destroy OSF nuclei and oxygen precipitate nuclei in a PV region up to the inner part of a wafer, but grown-in defects with silicon oxides remain in the vicinity of a surface of the wafer (see Patent Literature 2).
In addition, the introduction of oxygen results in a region in which an oxygen concentration is prone to increase through heat treatment at a low temperature (e.g., 400 to 500° C.) in a device step, and an oxygen donor easily occurs, which may cause the resistivity of the region to vary. When the resistance varies, the operating voltage of a device shifts, which may cause a malfunction. In particular, in a device manufacture step of recent years, heat treatment has been performed at a lower temperature and for a shorter period with the progress of making finer devices. Therefore, some heat treatments in the device step hardly cause a change in an initial oxygen concentration distribution, which increases the risk that the influence of a variation in outer-layer oxygen concentration becomes obvious.
Furthermore, in the manufacturing method of Patent Literature 1, oxygen diffuses outward through “the rapid thermal process in a nitriding atmosphere, an Ar atmosphere, or a mixed atmosphere thereof” performed after “the rapid thermal process in an oxidizing atmosphere”, which causes an oxygen concentration in a wafer outermost layer to decrease. If the oxygen concentration decreases, the mechanical strength of a portion with such an oxygen concentration decreases (see Patent Literature 3).
As seen from the above, the manufacturing method described in Patent Literature 1 can cause diverse problems due to the occurrence of regions with the increased and decreased oxygen concentrations.
Patent Literature 2 discloses “a method for manufacturing a silicon wafer, including a heat treatment step of performing rapid thermal annealing (RTA) treatment on the silicon wafer in an oxidizing atmosphere at 1250° C. or more and for 10 seconds or more, and a step of removing grown-in defects with silicon oxides region in the vicinity of an outer-layer portion of the wafer after the RTA treatment”. Patent Literature 2 describes that “this method enables the manufacture of a silicon wafer that includes no COPs or dislocation clusters, and in which defects such as OSF nuclei, and oxygen precipitate nuclei existing in the PV region that do not become obvious in an as-grown state are destroyed or reduced”.
However, this method cannot make the wafer include a BMD formed therein unless being further subjected to a predetermined process, and thus the wafer cannot be used in an environment where heavy metal pollution can occur.